Labels:text | screenshot | rectangle | font OCR: Dual CPU 1/0 Disk drives CPU CPU LAN segment External External coche cache MPSA bus (25MBps) Dual. Dugt: CPU CPU- Main bus (100MBps) Memory External cache CPU Figure 4: NeIFRAME's multiprocessing architecture has a hierarchical processor and bus design, The high-speed bus operates at 100MBps and is shared by the main processing unit and multiple MPSA. buses that operate at 25MBps. Each MPSA bus bas up to two I/O or application processors. Although this architecture appears to be different from the symmetric multiprocessor design in Figure 3. It is very similar if you ignore the MPSA bus controllers,
